1. Field of the Invention
The present invention relates generally to address translating apparatuses, and particularly to an address translating apparatus which translates a virtual address signal into a real address signal for accessing a memory cell array. The present invention has particular applicability to an address translating circuit which is provided within a microcomputer.
2. Description of the Background Art
Currently, microcomputers are utilized in various fields, and they are often used in data processing or in automatic control of various equipments, for example. A microcomputer often comprises a memory cell array for storing data operated or to be operated therein, in addition to a central processing unit (hereinafter referred to as CPU). More specifically, in a microcomputer, data is written into a memory cell array and the written data is read out in accordance with instruction from CPU.
In addition, a case often arises in which it is desired to externally refer to the data stored in the memory cell array of a microcomputer. To satisfy the request in this case, i.e. the request for also externally accessing the memory cell array, a dual-port random access memory (hereinafter referred to as DPRAM) is provided an internal memory within a microcomputer.
Generally, a DPRAM has two input/output ports. Specifically, the DPRAM provided within a microcomputer is accessed through the one input/output port by an internal CPU, and it is accessed through the other input/output port by an external CPU. More particularly, the external CPU can read out the data, which has been written into the DPRAM through the one input/output port by the internal. CPU, through the other input/output port. On the other hand, the external CPU can also write data into the DPRAM through the other input/output port.
Generally, in order that the external CPU may access the DPRAM of a microcomputer to (write therein/read therefrom), it is necessary to translate the address which the external CPU handles, i.e. a virtual address, into a real address signal (or a physical address signal) for designating a memory cell of the DPRAM. Now it is assumed that a virtual address means an address on a software basis, i.e. a memory map basis, which is handled by the external CPU.
Generally, the translation from a virtual address signal into a real address signal has so far been performed by operation processing by a CPU. This means that the burden of the CPU is increased by processing for address translation. More specifically, the arithmetic operations to be processed by the CPU are increased by the quantity of operations required for address translation, which delays the operational processing which is originally to be done by the CPU. In other words, the processing rate of the CPU has been lowered because of address translation.
As another method of performing address translation, it might be considered effective to provide a circuit for address translation within a microcomputer. In this method, however, the translatable address is fixed by the circuit, and necessity for circuitry change arises in order to adapt it to a plurality of external CPUs. It is not easy nor realistic to change the circuit configuration of such address translation circuits in accordance with the conditions in which address translation is needed.